PCB Anti-jamming Design Technology of High Speed DSP

In recent years, with the rapid development of new technology and devices, high-speed devices have become more and more popular, and high-speed circuit PCB design has become a widely needed technology. TI's DsPs chips, such as TMS320C62xx, C64xx and C67xx, are one of the rapidly developing high-speed devices.

The internal structure of C6000 is fixed-point, and the floating-point series is compatible with DsP. At present, the main frequency of CPU is 100MHz, -4i00MHz.

With VelociTITM's advanced Very Long Instruction Word (VLIW) structure core, it can execute 8 32 bit instructions in parallel in one instruction cycle. Because of its high-speed computing ability, it is widely used in communication, electronic countermeasure, radar and image processing fields which need high intelligence and high-speed processing ability.

With the increasing integration of chips, the pins of chips are more and more, and the packaging of devices is constantly changing, from DIP to OSOP, from SOP to PQFP, from PQFP to BGA.

The series of devices of TMS320C6000 are encapsulated by BGA. In the field of circuit application, BGA encapsulation has the characteristics of high success rate, low repairing rate and high reliability, and is applied more and more widely.

However, because BGA packaging belongs to the spherical grid array chip packaging, the physical implementation of the system in development, that is, board-level design involves many high-speed digital circuit design techniques.

Noise interference is the first factor in high-speed systems. Radiation and collision occur in high-frequency circuits, while ringing, reflection and crosstalk occur in faster edge rates. If the particularity of high-speed signal layout and wiring is not considered, the designed circuit board will not work properly. Therefore, the success of PCB board design is a key link in the process of PCB design of DSPs circuit.

1. transmission line effect

1.1 Signal Integrity

Signal integrity mainly includes reflection, ringing, ground bomb and crosstalk. The wiring on PCB board can be equivalent to capacitance, resistance and inductance structure in series and parallel. The typical value of series resistance is 0.25D. / R-4. 55DJft, shunt resistance is usually very high. When parasitic resistance, capacitance and inductance are added to the actual PCB connection, the final impedance of the connection is called characteristic impedance zo.

If the impedance of the transmission line does not match the impedance of the receiver, it will cause the reflection and oscillation of the signal.

The geometry of the wiring, incorrect wiring termination, transmission through the connector and discontinuity of the power supply plane all lead to reflection. Over-impact and down-impact are generated when the signal changes along the rising and falling edges of the level, which can produce burrs higher or lower than the stable level in an instant, and easily damage the device. The ringing and surround oscillation of signals are caused by inappropriate inductance and capacitance on the line, respectively. Ring can be reduced by proper end connection.

When there is a large current surge in the circuit, it will cause ground bomb. If there is a large transient current flowing through the power plane of the chip and the board, parasitic inductance and resistance between the chip package and the power plane will cause power noise. Crosstalk is a coupling problem between two signal lines. Mutual inductance and mutual tolerance between signal lines lead to noise on the line. Capacitive coupling leads to coupling current, while inductive coupling leads to coupling voltage. The parameters of PCB board, the distance between signal lines, the electrical characteristics of driver and receiver, and the way of wire end connection have certain effects on crosstalk.

1.2 Solutions

Some measures need to be taken to solve common problems:

The power supply layer has no restriction on the direction of current, and the return line can follow the path of the smallest impedance, that is, the closest to the signal line. This may minimize the current loop, which will be the preferred method for high-speed systems. However, the power layer does not exclude line clutter and pay no attention to the power distribution path, all systems will produce noise and cause errors. Therefore, special filters are needed, which are implemented by bypass capacitors. Generally, a capacitor from lshrimp to lOp.F is placed at the input end of the power supply on the board, while the capacitance from 0.01p.F to U0.1 core is placed between the power supply of each active device on the board and the pins of the ground. Bypass capacitors act like filters. Large capacitors (10aF) are placed at the input of the power supply. Low-frequency (60Hz) noise generated outside the board is filtered. Noise generated by active devices on the board generates harmonics at 100MHz or higher. Bypass capacitors placed between each chip are usually much smaller than those placed at the input of the power supply on the board.

According to experience, if analog-digital mixing is used in the design, PCB is divided into analog and digital parts, analog devices are placed in analog part, digital devices are placed in digital part, and A/D converters are placed across regions. Analog signals and digital signals are wired in their respective areas to ensure that the return current of digital signals does not flow to the ground of analog signals.

Bypass and decoupling are to prevent energy from transferring from one loop to another. Power supply layer, bottom line layer, components and internal power supply connection should be paid attention to.

Widening the width of power supply and ground wire is better than that of power supply line. Their relationship is: ground wire > power line > signal line. Usually, the width of signal line is O.2-O.3 mm, the thinnest width is 0.05"-'0.07 mm, and the power line is 1.2"-'2.5 n'Lrfl.

Use large area copper layer as ground wire. Connect unused places to ground wire on PCB. Or it can be made into multilayer PCB board, power supply, ground wire each occupies one layer. Each IC chip is equipped with a 0.01-core ceramic capacitor.

If the space of printed circuit board is too small to fit, an L-10 tantalum electrolytic capacitor can be installed on every 4-10 chips. The high frequency impedance of this device is very small. The impedance is less than lQ in the range of 500 kI-Iz-20 MHz, and the leakage current is very small (below O.5 LlA).

Decoupled filter capacitors must be installed close to integrated circuits to minimize capacitor lead and transient current loop area, especially high frequency bypass capacitors.

When the system works at 50MHz, there will be transmission line effect and signal integrity problems. Traditional measures can achieve satisfactory results. When the system clock reaches 120MHz, we need to consider the use of high-speed circuit PCB design knowledge, otherwise the PCB designed based on traditional methods will not work properly. Therefore, high-speed PCB circuit PCB design has become a design technology that electronic system designers must master.

2. PCB High Speed Signal Circuit Design Technology

2.1 High Speed Signal Wiring

Multilayer board is not only necessary for high-speed signal routing, but also an effective means to reduce interference.

It is necessary to choose reasonable layers to reduce the size of PCB, make full use of the middle layer to set shield, achieve near grounding, effectively reduce parasitic inductance, shorten the length of signal transmission, reduce cross-interference between signals and so on. All these are beneficial to the reliability of high-speed circuit.

Data show that the noise of the 4 layer PCB is 20 dB lower than that of the double sided PCB when the papers of the 8th National Symposium on Radiation-Resistant Electronics and Electromagnetic Pulse are of the same kind. The less the lead bends, the better. It's better to use full straight line. It needs turning. A 45 degree break line or arc turning can be used to reduce the external transmission and coupling of high-speed signals, and reduce the radiation and reflection of signals.

The shorter the lead between pins of high-speed circuit devices, the better. The longer the lead, the larger the distributed inductance and capacitance, which will lead to reflection and oscillation of high-speed circuit system. The fewer lead layers alternate between pins of high-speed circuit devices, the better, that is, the fewer holes are used in the process of component connection. It is estimated that a through hole can bring about about about 0.5pF distributed capacitance, resulting in a significant increase in circuit delay. In high-speed circuit wiring, attention should be paid to the "cross interference" introduced by the close parallel routes of signal lines. If parallel distribution cannot be avoided, large areas of "ground" can be arranged on the opposite side of parallel signal lines to reduce interference. In the two adjacent layers, the direction of the line must be perpendicular to each other.

Surrounding the especially important signal lines or local units by ground lines. It is possible to add protective wires to the periphery of signals such as clock signals and high-speed analog signals, which are not easily disturbed, and clamp the protective signal wires in the middle. All kinds of signal routes can not form a loop, nor can ground wires form a current loop. If the loop wiring circuit is generated, it will cause great interference in the system. The use of chrysanthemum chain wiring can effectively avoid the formation of loops when wiring. One or more high frequency decoupling capacitors should be installed near each IC block. Analog ground wire and digital ground wire should be connected to public ground wire with high frequency choke link. Some high-speed signal lines should be specially processed: differential signals are required to be on the same layer and as close as possible to parallel lines, and no signals are allowed to be inserted between differential signal lines, and equal length is required.

High-speed signal wiring should try to avoid branching or forming stumps (Stubs). High-frequency signal lines are prone to produce large electromagnetic radiation on the surface. Wiring high-frequency signal lines between the power supply and the ground line, through the absorption of electromagnetic waves by the power supply and the bottom layer, the radiation generated will be reduced a lot.

2.2 High Speed Clock Signal Routing

Clock circuit plays an important role in digital circuit. C64x DSP is the newest member of C6000 platform. It has high processing speed. The high-speed clock of C64x DSP can reach 1.1GHz, which is lO times higher than that of early C62x DSP. So in the future, the requirement of clock routing will be higher and higher in the application design of modern electronic system based on DSP. High-speed clock signal line has the highest priority. Generally, the main clock signal line of the system should be given priority in routing. The signal frequency of high-speed clock signal line is high, which requires that the route be as short as possible to ensure the minimum distortion of the signal.

High frequency clock, especially sensitive to noise interference. High-frequency clock signal lines need to be protected and shielded to minimize interference.

High-frequency clocks (clocks above 20MHz, or clocks with rising edges less than 5ns) must be escorted by a ground wire with a line width of at least 10rail and a line width of at least 20MIL for escorting the ground wire. The two ends of the protective ground wire of the high frequency signal line must be in good contact with the stratum through the hole, and every 5em or so must be connected with the stratum through the hole; the ground wire escort and the data line are basically equal in length, and manual wire drawing is recommended; the clock sending side must be connected with a 22-220Q damping resistance in series. The high-speed clock signal routing design is designed on the same layer as far as possible. There are no other interference sources and routing around the high-speed clock signal line. Star connection or point-to-point connection is recommended for high-frequency clock connection. T connection should ensure equal arm length, minimize the number of excess Ls, and copper should be coated under crystal oscillator or clock chip to prevent interference. Avoid the interference caused by the signal noise caused by these lines.

In high-speed signal routing and high-speed clock signal routing, it is required to play less DL and less branching in routing, so as not to cause stumps and produce signal reflection and winding. The influence of through hole and stump (Stub) in high-speed PCB not only reflects the influence on signal, but also leads to the change of conductor impedance. The influence of hole passing and tree stump on impedance is often neglected by designers.

Choose the appropriate size of the through hole. For example, for PCB design of 4 to 10 layers, the common choice is 10mil/20mil (drilling/pad) or 16mil/30mil. For some high density and small size PCB, 8mil/18mil can also be used. Large size can be considered to reduce impedance for power supply or ground wire through holes. The pins of the power supply and the ground should be placed close to the through hole. The shorter the lead between the through hole and the pin, the better. At the same time, the lead between the power supply and the ground should be as thick as possible to reduce the impedance.

The latest high-density system-level chips are packaged in BGA or COB, and the pin spacing is decreasing day by day. The sphere spacing is as low as O.6mm and will continue to decrease, which makes it impossible to use traditional wiring tools to extract the signal lines of packaging devices. At present, there are two methods to solve this problem: (1) extracting signal lines from the lower layer through holes under the ball; (2) finding a lead channel in the grid array by using ultra-fine wiring and free angle wiring. For such BGA or COB packaged high-density devices, wiring with minimal width and space is the only feasible way. Only in this way can high yield and reliability be guaranteed and high-speed design requirements be met.

2.3 Design of Welding Pad for BGA Packaging

With the development of device packaging technology, the relative size of device packaging becomes smaller and smaller.

There are 352 pins in the series of devices of TMS320C6000, because the BGA pin spacing is dense and the through hole is close to the pin, which will produce a large inductance. It is also harmful to high-speed signals, so when BGA scattering holes, try to use smaller holes. There is a corresponding relationship between the pad size of BGA and the foot spacing of BGA, but it can not be larger than the diameter of the foot ball of BGA, usually about its l/10~l/5. Pass holes near BGA pad and pad need plug holes and cover green oil on component surface. For BGA welding, no other devices can appear in the surrounding 2era.

3. Conclusion

Digital signal processor is the core of signal processing. With the popularity of high-frequency devices, PCB density increases, interference increases, and signal quality improvements have come to the top of the design. The PCB board design of high-speed DSPs is a very complex design process. There are many factors to be considered in the design of high-speed circuit PCB, and these factors correspond to each other. If high-speed devices are located close to each other, the delay can be reduced, but crosstalk and significant thermal effects may occur. It is also a contradiction that high-speed signals are routed as far as possible in the inner layer and fewer holes are punched. Therefore, in the design, it is necessary to consider all the advantages and make a comprehensive circuit PCB design.

Only in this way can we design a high quality PCB circuit board with strong anti-interference ability, stable performance and high real-time performance.